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ATmega128
2. V BOT may be below nominal minimum operating voltage for some devices. For devices where
this is the case, the device is tested down to V CC = V BOT during the production test. This guar-
antees that a Brown-out Reset will occur before V CC drops to a voltage where correct
operation of the microcontroller is no longer guaranteed. The test is performed using
BODLEVEL=1for ATmega128L and BODLEVEL=0 for ATmega128. BODLEVEL=1 is not
applicable forATmega128
Power-on Reset
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level
is defined in Table 19 . The POR is activated whenever V CC is below the detection level. The
POR circuit can be used to trigger the Start-up Reset, as well as to detect a failure in supply
voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
device is kept in RESET after V CC rise. The RESET signal is activated again, without any delay,
when V CC decreases below the detection level.
Figure 23. MCU Start-up, RESET Tied to V CC .
V CC
RESET
TIME-OUT
V POT
V RST
t TOUT
INTERNAL
RESET
Figure 24. MCU Start-up, RESET Extended Externally
V CC
RESET
TIME-OUT
INTERNAL
RESET
V POT
V RST
t TOUT
External Reset
An External Reset is generated by a low level on the RESET pin. Reset pulses longer than the
minimum pulse width (see Table 19) will generate a reset, even if the clock is not running.
Shorter pulses are not guaranteed to generate a reset. W hen the applied signal reaches the
Reset Threshold Voltage – V RST on its positive edge, the delay counter starts the MCU after the
Time-out period t TOUT has expired.
51
2467X–AVR–06/11
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